Architecture for the Secret-Key BC3 Cryptography Algorithm

Cryptography is a very important aspect in data security. The focus of research in this field is shifting from merely security aspect to consider as well the  implementation  aspect.  This  paper  aims  to  introduce  BC3  algorithm  with focus  on  its  hardware  implementation.  It  proposes  an  architecture  for  the hardware  implementation  for  this  algorithm.  BC3  algorithm  is  a  secret-key cryptography  algorithm  developed  with  two  considerations:  robustness  and implementation  efficiency.  This  algorithm  has  been  implemented  on  software and has good performance compared to AES algorithm. BC3 is improvement of BC2 and AE cryptographic algorithm and it is expected to have the same level of robustness and to gain competitive advantages in the implementation aspect. The development of the architecture gives much attention on (1) resource sharing and (2)  having  single  clock  for  each  round.  It  exploits  regularity  of  the  algorithm. This architecture is then implemented on an FPGA. This implementation is three times smaller area than AES, but about five times faster. Furthermore, this BC3 hardware  implementation  has  better  performance  compared  to  BC3  software both in key expansion stage and randomizing stage. For the future, the security of this implementation must be reviewed especially against side channel attack

An Asymmetric Watermarking Method in the DCT Domain Based on RC4-Permutation and Chaotic Map

This paper presents an asymmetric watermarking method in the DCT domain for still images based on permutation and chaos. This method uses secret watermark as private key and public watermark as public key. The public watermark has a normal distribution with mean = 0 and variance = 1. The secret watermark is obtained by permutating the public watermark according to combination of a part of RC4 algorithm and a logistic map. The watermark is embedded into mid-frequency components of the DCT block for better robustness. The detection process is implemented by correlation test between the public watermark and the received image. Experiments show that the watermarking method was proved to be robust againts some typical image processings (cropping, JPEG compression, resizing, rotation, sharpening, and noising)

The MFIBVP real-time multiplier

This paper presents the architecture of the MFIBVP real-time multiplier which is The MFIBVP technique is a combination of the MSB–First computation, the Interval-Bounded Arithmetic and the Variable-Precision computation techniques.The MFIBVP computation guarantees the computation carried out will produce high accuracy from the early computation time, self error estimation and time-optimal computation. This paper shows the performance of the MFIBVP real-time multiplier unit that can gives accuracy of it’s intermediate-result more than 99% since the second phase of its process

Attacking AES-Masking Encryption Device with Correlation Power Analysis

Modern communication system use cryptography algorithm to ensure data still confidentiality, integrity, and authentic. There is a new vulnerability in a cryptographic algorithm when implemented on a hardware device. This vulnerability is considered capable of uncovering a secret key used in a cryptographic algorithm. This technique is known as a power analysis attack. Previous and other research introduces countermeasure to countering this new vulnerability. Some researchers suggest using logic level with encoding the AES. The countermeasure using logic is meager cost and efficient. The contribution of this paper is to analyze CPA on encryption device that has been given logic level countermeasure. Our finding of this paper is the use of encoding with one-hot masking technique does not provide the maximum countermeasure effect against CPA-based attacks. In this research, CPA attack can be successfully revealing the AES secret-ke

PERANCANGAN ATURAN TRANSFORMASI UML – SYSTEMC DALAM PERANCANGAN EMBEDDED SYSTEM

Pemodelan adalah salah satu proses awal dalam pengembangan suatu aplikasi atau produk. Tahap ini dilakukan untuk meminimalkan kesalahan pada produk akhir. Salah satu metode pemodelan berorientasi objek yang banyak digunakan adalah pemodelan UML (Unified Modeling Language). Dalam UML suatu sistem dipandang sebagai kumpulan objek yang memiliki atribut dan method. SystemC adalah bahasa perancangan perangkat keras yang berbasis C++. SystemC merupakan sebuah library yang mendefinisikan tipe-tipe komponen perangkat keras. Dalam pemodelan bersama perangkat keras dan perangkat lunak, UML dan SystemC memiliki kemampuan yang sama. Pada paper ini dilakukan analisis proses transformasi dari pemodelan berorientasi objek dengan UML dan implementasi dengan menggunakan SystemC. Hasil penelitian menunjukan bahwa proses transformasi UML-SystemC dapat dilakukan karena keduanya memiliki nature yang sama sebagai lingkungan yang dapat merancang bersama hardware dan software. Perangkat yang digunakan untuk penelitian ini adalah Rational Rose dan SystemC. Modeling is one of the first process in the development of an application or product. This phase is done to minimize errors in the final product. One method in object-oriented modeling that is widely used is UML (Unified Modeling Language). In UML a system is seen as a collection of objects that have attributes and methods. SystemC is a hardware design language based on C++. SystemC is a library that defines the types of hardware components. In a joint modeling of hardware and software, UML and SystemC have similar capabilities. In this paper, researchers analyzed the transformation of object-oriented modeling with UML and the implementation by using SystemC. The results shows that the transformation process of UML-SystemC can be done because both have the same nature as the environment that can design both hardware and software. The device used for this study is the Rational Rose and SystemC